During turn-off of a power transistor, over-voltages may be for example generated across the power transistor, e.g. between a collector terminal and an emitter terminal of an Insulated Gate Bipolar Transistor (IGBT) or between a source terminal and a drain terminal of a vertical power Metal Oxide Semiconductor Field Effect Transistor (MOSFET). The over-voltages may cause the destruction of the power transistor or excessively high electromagnetic interferences. In fact, in order to quickly turn-off a power transistor with low switching losses, an internal capacitance of the power transistor (e.g. a gate-emitter capacitance in case of a IGBT) may need to be discharged in a few hundreds of nanoseconds via a current of several amperes flowing from the internal capacitance through the control terminal.
Furthermore, parasitic inductances between the internal capacitance and the control terminal may cause unexpected oscillations causing even stronger electromagnetic interferences.
To solve this problem typically an external resistor of a few ohms is used in series with the control terminal of the power transistor. This limits the discharge current during turn-off, and limits over voltages across the power transistor. However, the overall turn-off time of the power transistor, and as a consequence the switching losses associated with the turn off of the power transistor are increased by the external resistor.
As another solution, Idir, N.; Bausiere, R; Franchaud, J. J., “Active voltage control of turn-on di/dt and turn-off dv/dt in insulated gate transistors,” IEEE Transactions on Power Electronics, vol. 21, no. 4, pp. 849-855, July 2006, hereinafter referred to as Idir, discloses a controlled turn-off of an IGBT. The controlled turn-off makes use of an active gate voltage control (AGVC) that generates, during the turn-off of the IGBT, intermediate gate voltage-levels between a full turn-on gate control voltage, typically +15 V for an IGBT transistor, and a full turn-off gate control voltage of 0 V, in order to reduce the over-voltages across the IGBT and at the same time maintaining the overall turn-off time within acceptable levels.
However, a problem associated with this solution is that a complex feedback control loop is required to generate the intermediate gate voltage levels. In fact, the feedback control loop adjusts adaptively the gate control voltage in function of a detected slope change in the output voltage, i.e. the collector voltage in an IGBT, of the power transistor.